CPU flags register
To support conditional jump instructions, we need a flags register that holds onto state about the result of previous instructions and serves as another input to the control logic to determine how future instructions will execute. In this video, I explain the motivation for why we need a flags register, how it will interact with the rest of the computer, and of course build it!
Comments (5)
As usual another great video, thankyou. I have updated my schematic capture to include the changes from this video <a href="https://github.com/kyllikki/eda-designs/tree/master/SAP-BE" rel="nofollow noopener" target="_blank">https://github.com/kyllikki/eda-designs/tree/master/SAP-BE</a>
Hello Ben! Thank you for this excellent series. Since you asked about suggestions for future projects, I was hoping you'd continue on to the SAP-3 from Digital Computer Electronics by Albert Paul Malvino.
Ben, you asked about future projects. Here's one to consider. I'm starting work on a Z80 retro project using mostly original ICs, the exception being really old hard-to-find RAM like MK4118N that some "entrepreneurs" are selling on eBay for $20 each. In those cases, they'll be replaced with modern 32K SRAM as will the original glass window EPROM with modern 32K EEPROM. Because the Z80 is a standalone CPU with no microcontroller functionality like the later Z88s, Arduino UNOs, etc., you have to engineer attachments. As you know, the Z80 comes from the 64K/8-bit world so there will be immediate limitations that can be turned into challenges. If you want video instead of just using RS232 to Terra Term or whatever, you'll most likely need 80 columns by 25 rows. That's 2k by 8 bits/character or 16KB so you've used up half your RAM. Configuring glue logic to perform bank switching may overcome that challenge; I don't know cuz I've just started looking into it. Many of us are tired of entering the machine code program via dipswitches so having the ability to store our programs in old Flash RAM devices that support 8-bit mode is a great improvement. Several folk in the netherworld take pride in posting their schematics and design blogs. Personally, I'm using your mono/a/bi-stable clock circuit to single-step my way through basic testing of the device(s) as I build the system by way of the NOP program which involves tying the data bus low (NOP = 0x00) so you can see the M1/MR/RD control signal LEDs flash in sequence as the program counter advances the address bus LEDs. Reference pages 22-27 of "Z-80 Microcomputer Design Projects by William Barden Jr.". <a href="http://www.ballyalley.com/ml/z80_docs/Z80_Design/Z-80%20Microcomputer%20Design%20Projects%20(William%20Barden%20Jr)(1980).pdf" rel="nofollow noopener" target="_blank">http://www.ballyalley.com/ml/z80_docs/Z80_Design/Z-80%20Microcomputer%20Design%20Projects%20(William%20Barden%20Jr)(1980).pdf</a>
Superb, as usual, Ben! It's been awhile since I worked on my/your computer so I had to watch the video twice - great, just the same!
Excellent work, thanks so much for the knowledge transfer. I really enjoy your work.